IMPLEMENTATION OF ALGORITHMS FOR SOLVING ROUTING PROBLEM WITH CONGESTION USING VHDL

Abstract

The VRP (vehicle routing problem) focused on distribution of product from a depot to all customers with a limited number of vehicles. In practical scenario however we often meet with road congestion. In this paper Multi object ant colony system (MOACS) algorithm is implemented for solving VRP with Congestion, Here new parameters are added for road congestion which act as obstacle. The whole design is implemented in VHDL language using a bottom-up design and verification methodology. The algorithm is targeted for Xilinx Virtex family of FPGA. The design is optimized to meet the minimum travel time by using the MOACS algorithm The tool selected for design is Xilinx foundation series and modelsim. Xilinx tool has been chosen because it has complete flow integrated in to single tool .Also Xilinx FPGA are proven in performance and readily available. The modelsim simulator is a powerful simulator it supports VHDL and Verilog for simulation. Test benches can be written to automate and reduce the time for testing The design verification can be done in Modelsim by importing the VHDL.