ANUJ DEV & SANDIP NIMADE. PERFORMANCE ANALYSIS OF HIGH SPEED CMOS FULL ADDER CIRCUIT FOR LOW VOLTAGE VLSI CIRCUIT DESIGN IN NANOMETER. International Journal of Research Science and Management, [S. l.], v. 4, n. 5, p. 48–54, 2017. Disponível em: http://ijrsm.com/index.php/journal-ijrsm/article/view/427. Acesso em: 23 dec. 2024.