Anuj Dev & Sandip Nimade. “PERFORMANCE ANALYSIS OF HIGH SPEED CMOS FULL ADDER CIRCUIT FOR LOW VOLTAGE VLSI CIRCUIT DESIGN IN NANOMETER”. International Journal of Research Science and Management 4, no. 5 (May 30, 2017): 48–54. Accessed December 23, 2024. http://ijrsm.com/index.php/journal-ijrsm/article/view/427.